Full-duplex RF front-ends in WLAN networks require careful design to limit receive desensitization due to transmit noise and transmit error vector magnitude (EVM) degradation caused by receiver local oscillator (LO) leakage to the transmit path. In addition, frequency pulling is a concern in full duplex systems where receive and transmit voltage-controlled oscillators (VCOs) must operate simultaneously and be close in frequency.
As a consequence, such full-duplex systems and many other applications, require two driving signals, typically referred to as I and Q or quadrature signals, having the same frequency and having their phases in quadrature with each other, i.e. presenting a relative phase offset of 90°. It is important that these quadrature signals I and Q are balanced in amplitude, i. e. have substantially the same amplitude, and that the phase error from the desired 90° phase shift is as small as possible.
Such signals are commonly generated by frequency doublers. However, many state-of-the-art frequency doubling circuits introduce amplitude mismatch and quadrature phase offset between the quadrature signals.
FIG. 1a illustrates a state-of-the-art frequency doubler producing quadrature signals. A voltage controlled oscillator (VCO) 100 is used to create a differential sinusoidal output 101 and 102. These signals are input into a polyphase filter 110, which is an arrangement of resistors and capacitors interconnected in such a way so as to produce two quadrature differential outputs. Outputs 120 and 121 are referred to as cos(ωt) and −cos(ωt), respectively, while outputs 122 and 123 are referred to as sin (ωt) and −sin(ωt), respectively. In mixer 130, the cos(ωt) terms are multiplied together, yielding cos(2ωt). Since cos(2ωt)=2 cos(ωt)−1, the output of mixer 130 is equal to ½ cos(2ωt)+½. In this scheme, the mixing term resulting from squaring the polyphase filters in-phase signal (mixer A 130) will have a DC offset, preferably removed with a tuned load to ensure matched mixer bias conditions and minimal phase error. Unfortunately, tuned loads consume die space and limit circuit bandwidth. Also, the outputs of the polyphase filter are not equally loaded. This unbalanced loading leads to quadrature phase error.
An attempt to address the issues of having a bulky tank circuit and an unbalanced polyphase filter load present with the doubler in FIG. 1a are addressed via the topology shown in FIG. 1b. In this embodiment, mixer 140 multiplies cos(ωt) by itself, yielding cos2(ωt). Mixer 141 multiplies sin(ωt) by itself, yielding sin2(ωt). The output of mixer 141 is subtracted from the output of mixer 140, yieldingI=cos2(ωt)−sin2(ωt)=cos(2ωt)
Similarly, mixer 142 and mixer 143 both multiply sin(ωt) by cos(ωt), yielding sin(ωt)cos(ωt). These terms are summed yieldingQ=2 sin(ωt)cos(ωt)=sin(2ωt)
However, the circuit in FIG. 1b introduces considerable amplitude imbalance when mixer non-linearities are considered. This occurs because the conversion gain of each mixer is a function of the relative phase offset of its input signals.
The dependence of the conversion gain on the relative phase offset can be explained by way of example considering a simple Gilbert mixer implementation as in FIG. 2. In this Gilbert mixer, the output voltage, Vout can be expressed as a function of the two input voltages, Vquad and Vin, as follows:Vout=(RLVin/RE)tan h(Vquad/2VT)where VT is the thermal voltage of the transistor, given by kT/q.
Returning to FIG. 1b, assume that each of the mixers 140-143 is implemented as a Gilbert mixer. Mixers 140 and 141 each multiply a signal by itself thus their inputs are in-phase, while mixers 142 and 143 multiply two signals which are in quadrature. Thus the peak output of mixers 140 and 141 occurs when the input sinusoid achieves its peak value. At the input peak, the tan h(Vquad/2VT) term in (1) introduces compression due to the nonlinearity of the mixing quad devices M1 to M4 in FIG. 2, when Vquad>>VT.
On the other hand, mixers 142 and 143 reach their maximum value when each of its inputs are at 1/√2 of their peak value. The harmonics introduced by the mixing quad compression are dependent upon the input phase such that when vector summed to give the mixer output, the conversion gain will be higher for orthogonal inputs compared to when the two inputs are in-phase. The result is that the amplitude of the I output will be lower than the amplitude of the Q output, an unacceptable imbalance when used in a doubler design to provide the LO in an image reject mixer.
FIG. 3 illustrates the simulated conversion gain (with respect to the input port, Vin) of the Gilbert mixer shown in FIG. 2 as a function of the phase offset, θ, at its input ports. Aq is the peak differential drive level on the mixing quad while Ai is held constant at 100 mV. For low input levels where Aq<<VT, tan h (Vquad/2VT)=Vquad/2VT and the conversion gain shows minimal sensitivity to input phase. This implies drive levels too low to be useful for driving mixer LO ports, and subsequently a high noise floor. As Aq is increased, the conversion gain begins to saturate with respect to the quad drive level but exhibits increasing phase sensitivity. As shown, the worst case mismatch occurs when the input sinusoids are in quadrature, as used in the doubler topology shown in FIG. 1b. 
The zero crossings at each differential pair in the mixer are not affected by the mixing quad nonlinearity and hence a phase error is not introduced. In practice large signal effects in the presence of this nonlinearity will cause mixer imbalances resulting in slight phase offsets.
If the topology in FIG. 1b is used, the outputs will exhibit amplitude imbalance proportional to the drive level at the polyphase filter input owing to the aforementioned mixer nonlinearities.
To minimize the mixer distortion, one approach has been to attempt to linearize each mixer's conversion gain with respect to the mixer quad inputs. Knowing that the output of the Gilbert mixer is proportional to tan h (Vquad), the mixer output can be linearized by applying an inverse tan h function to predistort the Vquad input. However, this approach presupposes a wide dynamic range predistortion circuit. Process variations will cause such a circuit to contribute to output phase and amplitude imbalance.
Therefore, an improved frequency doubling circuit is needed to reduce the amplitude imbalance between quadrature signals. Such a circuit would minimize transmissions occurring at the image frequency, thereby improving the receiver performance of a wireless communication device. Additional, although amplitude mismatch is a major source of error, phase offset between the quadrature signals represents another source of error. Thus, a phase shifter circuit that reduces the phase error between two quadrature signals can further minimize transmissions occurring at the image frequency. A method of calibrating such a phase shifter to compensate for process, temperature and supply voltage variation would provide further advantages.